In this paper, the authors introduce two novel architectures for parallel decimal multipliers. Their multipliers are based on a new algorithm for decimal carry – save multioperand addition that uses a ...
In order to meet the requirements in real time DSP applications MAC unit is required. The speed of the MAC unit determines the overall performance of the system. MAC unit basically consists of ...
As defined by the IEEE 754 standard, floating-point values are represented in three fields: a significand or mantissa, a sign bit for the significand and an exponent field. The exponent is a biased ...
Staking a claim to the title of world's fastest 64-bit floating-point coprocessor chip, Clear-Speed Technology's CSX600 can deliver a sustained 25 GFLOPs for DGEMM (matrix multiplication) calculations ...
The complex computational block on Atmel’s mAgic DSP core consists of four integer/floating-point multipliers, an adder, a subtractor, and two add-subtract integer ...
Infinite impulse response (IIR) filter implementations can have different forms (direct, standard, ladder, …), different math (fixed-point or floating-point), and different quantization (number of ...
TI's TMS320C3x integrates a Von Neumann µP architecture with a high-performance, 32-bit, floating-point DSP MAC core. On the µP side, the C3x supports a unified, flexible, 24-bit address space (16 ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results