Electronic Design

Find the Fastest Route to Portable Stimulus Tests with SystemVerilog (.PDF Download)

The Portable Stimulus Specification (PSS) is all about reusing commonly used test atoms to create new scenarios more quickly. It saves us from wasting precious time recreating the same test ...
Design-Reuse

Springer Publishes ARM-Synopsys Verification Methodology Manual for SystemVerilog

New ARM-Synopsys Book Provides Blueprint for System-on-Chip Verification Success Using SystemVerilog NEW YORK -- Sept. 21, 2005 -- Springer Science + Business Media, Inc., a major publisher of ...
EDN

SystemVerilog assertions unify design and verification

The SystemVerilog standard is the result of an industry-wide effort to extend the Verilog language in a consistent way to include enhanced modeling and verification features. By adding verification ...
Design-Reuse

Transaction Recording, Modeling and Extensions for SystemVerilog

Adoption of transaction level modeling and the necessary tools for debugging and analysis has been slower than would be expected from growing SOC design sizes and complexities. This paper discusses ...