EDN

Choose your PLL lock-time measurement

Rising clock speeds and tighter signal timing has increased demand for accurate high-frequency modules. The PLL (phase-locked loop), which generates a high-frequency output signal based on an input ...
Electronic Design

How to Design Very Wide Loop BW High-Performance PLL Frequency Synthesizers (Part 3)

A special technique produces very wide loop BWs in high-frequency PLLs (and hence, indirect (PLL) synthesizers), thereby achieving very low phase noise rivaling that of direct (MMD) synthesizers. A ...
EDN

EDN — 06.09.94 Technique eases design of high-order PLL

Maintaining stability in high-order PLLs can be a chore. Two design programs can assist you in designing stable types 2 and 3, third-order PLLs. Designers are using PLLs in a variety of applications, ...
Electronic Design

How to Design Very Wide Loop BW High-Performance PLL Frequency Synthesizers (Part 1)

This is Part 1 of a three-part series. As modern wireless communications systems (mainly superheterodyne radio transceivers) are now required to deliver higher performance than ever before, they’re ...