Design-Reuse

Design and Implementation of an OCP-IP Compliant 64-Node Butterfly Network on Chip on Multi-FPGA

There is a growing demand of high-performance computing systems to cope with increasing data size and amount of arithmetic operation in various scientific computations. On top of this, several ...
EDN

Synopsys steps up efforts in FPGA design tools

SAN MATEO, Calif. — Once thought of as paying only lip service to FPGA tools, Synopsys Inc. is now acting like a serious player in high-end FPGA design. The company recently announced it has developed ...
Hackaday

VexRiscv: A Modular RISC-V Implementation For FPGA

Since an FPGA is just a sea of digital logic components on a chip, it isn’t uncommon to build a CPU using at least part of the FPGA’s circuitry. VexRiscv is an implementation of the RISC-V CPU ...
Design-Reuse

FPGA Implementation of DLX Microprocessor With WISHBONE SoC Bus

DLX is an open source microprocessor, it’s free and it has never been implemented in a commercial ASIC (Application Specific Integrated Circuit) design. The objective of this project is to use the ...
EDN

Inside DSP on Tools: FPGA Tools Bridge Gap Between Algorithm and Implementation

Increasingly FPGAs are being used to perform signal-processing tasks, particularly in computationally demanding application areas such as video processing and communications. Their massive parallelism ...